register memory
英 [ˈredʒɪstə(r) ˈmeməri]
美 [ˈredʒɪstər ˈmeməri]
网络 暂存器记忆体
双语例句
- This register is used to limit the amount of memory that a partition can access in real mode.
这个寄存器用于限制分区在实模式中可以访问的内存量。 - Fired when an aspect of the target, such as a variable, register, or portion of memory, changes value
当目标的某个元素（例如变量、注册表或部分内存）的值发生改变时触发 - The PowerPC uses a load/ store ( also called RISC) instruction set, which means that the only time it accesses main memory is for loading into registers or copying a register to memory.
PowerPC使用了加载/存储（也成为RISC）指令集，这意味着访问主存的惟一时机就是将内存加载到寄存器或将寄存器中的内容复制到内存中时。 - Stepping through each command and watching how the register and memory values are affected is also a great way to learn the basics of the Intel machine language commands.
单步执行每个命令并观察寄存器和内存值如何受影响，这也是学习Intel机器语言命令基础知识的理想方法。 - If you do, the value of the counter must first be copied on to a register, decremented, and then updated to its memory.
如果这样做，counter的值必须先复制到寄存器，递减，然后对其内存更新。 - The index register is added to the specified address, and the result is used as the address for the memory access.
索引寄存器会与某个指定的地址相加，结果用作访问内存时使用的地址。 - Whenever memory is accessed in real mode, the physical processor adds the value of the RMO register to the partition's specific real address so that it references a true address in the physical memory.
在采用实模式访问内存时，物理处理器会将RMO寄存器的值与分区特定的实地址相加，以使得它能够引用物理内存中的实地址。 - In register mode, rather than accessing the contents of main memory, you access registers.
在寄存器寻址模式中，我们也不会访问主存的内容，而是访问寄存器。 - General register unit The fastest memory is known as cache memory and is what it sounds like-memory that is used to temporarily hold, or cache, contents of the main memory.
通用寄存器单元-用以存储微程序的暂时存储区最快的的存储器是高速缓存，它被用来暂存主存中的内容。 - Local storge address register addressable memory
局部存储器的地址寄存器 - The CLR JIT can only track a fixed number of variables for register allocation; once it has to track more than this, it begins to spill the contents of registers into memory.
CLRJIT只能跟踪固定数目的寄存器分配变量；一旦需要跟踪的数目超出这个数目，它就开始将寄存器的内容移到内存中。 - In order to update a segment register, the corresponding segment descriptor must be modified in kernel memory and then reloaded into the segment register.
更新段寄存器时，与其相应的段描述符必须在核心内存中修改，然后重新载入段寄存器。 - The CPU reads the data, shifts the bits in the register containing the data by the necessary amount of bit positions, and writes the data back to memory.
CPU读取数据、移动包含数据的寄存器的位到必要的位置，然后将这些数据写回内存。 - The most common analysis is data dependence analysis, which is to determine the instructions that use the variable ( register or memory location) modified by another instruction.
最通常的分析是数据依存性分析，它用来确定指令使用的变量（寄存器或内存位置）是否被另一条指令修改。 - In this paper, based on the memory unit of the SIMD architecture, we propose a compilation scheme to exploit the partial reuse of the vector register data, and improve memory access efficiency in SIMD optimization.
因此，本文基于SIMD架构的访存特性，提出了一种向量寄存器部分重用的方法，以提高访存效率；优化体育教学方法，首先，须确立适度可行的教学目标； - Register Transfer Level Coverage-Driven Verification of External Memory Interface
RTL级基于覆盖率驱动EMI的验证 - In response to the disadvantages of register window method of Berkeley RISC processor, this paper presents an improved archi-tecture with an off-chip special stack memory.
本文通过分析BerkeleyRISC处理器寄存器窗口方法的特点，针对其不足之处提出改进其结构的方法，并给出增加一个芯片外专用堆栈存储器的改进体系结构的设想。 - How to visit the interior register or memorizer of PCI equipment memory
如何访问PCI设备的内部寄存器/存储器 - The digital circuits are mainly composed of an RISC and the exterior circuits including the shift register, the clock producer, the address decoder and the memory.
数字电路主要由中央处理单元及其外部模块构成，其中中央处理单元主要是一个8位的RISC，外部模块则包括移位寄存器、时钟产生器、地址译码器和存储器。 - There are two types of data dependencies between instructions, register and memory dependencies.
在目标代码中可以区别两类数据相关，一类是寄存器数据相关，一类是存储器数据相关。 - The debugging circuit is compatible with the IEEE standard 1149.1. Its feature includes: Breakpoint, Single step, View or modify CPU register/ memory space, in-circuit FLASH programming.
此JTAG调试电路与IEEE1149.1标准兼容，具有设置断点、单步、查看或修改CPU寄存器/内存空间、在线FLASH编程等多种功能。 - Directly making a program design control to the register and memory in EGA/ VGA has characteristics of display at a high speed and overall functions.
直接对EGA／VGA上的寄存器和内存编程控制，具有显示速度快和功能全的特点。 - Based on the jointed test action group ( JTAG) protocol, instructions and scan chain were introduced. With test access port ( TAP) module exchanging serial input with parallel output, register files and random access memory on chip were read or written in parallel.
在JTAG接口协议的基础上，增加指令和扫描链，同时通过测试访问端（TAP）控制把串行输入转换成并行输出，并行访问数字信号处理器的寄存器文件和片上存储器单元，实现嵌入式模拟器。 - And class 1 device controller module is divided into error handle, master frame register, MCU and traffic memory controller units etc.
MVB1类模式控制模块又划分为报文错误处理单元、主帧寄存器单元、TM控制单元和主控单元等。 - Experiments show that the lookup capability of network processor can be effectively improved with only a small number of cache entries per processing element. ( 4) A register file and a novel memory hierarchy component, called Split Control Cache, are proposed for network processors.
实验表明，每个处理单元中只要维护少量的缓存表项，就可使网络处理器的查找能力获得有效的提升。（4）提出了一种网络处理器存储子系统中寄存器堆和cache机制的设计方法。 - Many new technologies are adopted in circuit design, such as limited dynamic circuit, multi-ported register file, high-performance low-power on-chip memory.
为实现高频设计目标，在电路设计中采用了很多新技术，如有限动态电路、多端口寄存器文件、高性能低功耗存储器等等。 - Register File is a key part in microprocessor, located in the top level of memory hierarchy, so it requires the highest access speed.
寄存器文件作为微处理器内核的关键部件，处于存储层次的顶层，是访问速度要求最高的存储部件。 - Secondly, through the bus-based scan chain shifting CPU instructions into the target system, and implementation of these instructions by single step in hardware debug mode, to modify the bus data, register data and memory data.
其次，通过对基于总线的扫描链的移位操作插入目标系统CPU本身的指令，并在硬件调试模式下单步执行这些指令，对系统内部的总线数据、寄存器数据、存储器数据进行修改。